Incident reviews

On October 27, 2023, the company released its third quarter report. The company achieved revenue of 2,980 billion in the third quarter, an increase of 2.53% over the previous year. The cumulative revenue for the first three quarters was 8.068 billion yuan, a year-on-year decrease of 11.60%. Net profit for the third quarter was RMB 20 million, a year-on-year decrease of 89.49%. The cumulative net profit for the first three quarters was 83 million yuan.

Actively promote advanced packaging research and development, and continuously expand automotive-grade products. In the first half of 2023, the company continued to carry out research and development of advanced packaging technology, promote R&D of advanced packaging technologies such as 2.5D Interposer, UHDFO, and FOPLP, complete the development of packaging technologies such as BDMP, HBPOP, and high-heat dissipation FCBGA (indium sheet) processes, and continuously expand the range of automotive-grade products. The company has passed the VDA 6.3 audit of a number of domestic and foreign automotive customers, further increasing the scale of automotive electronics products. Continue to carry out product yield improvement work, vigorously promote inspection automation, improve quality control capabilities and inspection efficiency, promote the “Lean Six Sigma” management method to the supply chain, concentrate efforts on overcoming difficult product yield improvements, and improve customer satisfaction. In 2022, the company introduced 237 customers, passed the review of 6 domestic and foreign automotive terminal and auto parts companies, and introduced 42 automotive electronics customers, involving 202 automotive electronics projects.

Build a foundation for advanced packaging technology based on the 3D Matrix platform. The company now has the latest advanced packaging technology platform composed of TSV, eSiFO, and 3D SiP - 3D Matrix. Among them, eSifo is mainly used in fan-out packaging. Its advantages include low warpage, low stress, high reliability, short production cycle, and high degree of integration. (1) eSiFO: By etching a groove on the silicon substrate, the front of the chip is placed upward and fixed in the groove. The chip surface and the silicon wafer surface form a fan protruding surface, multi-layer wiring is performed on the fan outlet surface, and a solder ball is made at the lead-out end, and finally cut, separated, and packaged. Through eSifo technology, multiple chips can be integrated together. Compared with traditional packages, the overall package size is greatly reduced, the interconnection between chips is shorter, and the performance is stronger. Based on eSiFO technology, 3D and SiP packaging can be realized through wafer-level packaging technologies such as TSV and Bipolar, providing the possibility for heterogeneous integration of multiple chips. (2) eSINC: Based on eSifo technology, Huatian Technology continues to develop 3D fan-out wafer-level packaging eSINC technology based on large cavity dry etching, TSV blind holes, and temporary bonding technology. This technology uses TSV holes to achieve vertical interconnection to improve connectivity density and integration. The maximum package size that ESINC technology can achieve can reach 40mmx40mm, the minimum bump/pitch size of the flip-chip can be 40μm/70μm, and the interconnected TSV depth-to-width ratio can be 5:1. Currently, the 3D stacking package for customers integrates a total of 8 chips, and the overall package thickness is less than 1mm. The target applications of this technology are mainly in many fields such as Al, IoT, 5G, and processors. Compared to existing 3D wafer-level fan-out packaging technologies on the market (such as Info-POP), eSINC technology enables 3D interconnection through high-density via last TSV. Compared to LNFO-pop's TMV technology, the interconnection density is higher, and the package thickness can be selected according to different customer needs. The biggest advantage of eSINC is that it replaces plastic with a silicon base. Using silicon as the carrier, its thermal expansion coefficient, Young's modulus, and thermal conductivity are superior to plastic materials, and the silicon carrier is the same material as the chip, so the wafer warpage of eSINC is significantly less than Info-POP, and the heat dissipation performance of eSINC products is significantly better than that of Info-Pop products. At the same time, since the silicon base is used as the carrier, compatible with mature silicon processes, high-density 3D interconnection can be achieved through the TSV process. A silicon-based groove structure for embedded chips can be prepared through the silicon etching process, thus achieving 3D chip integration. Placing a chip on an eSINC wafer or stacking two eSINC wafers forms 3D FO SiP packaging technology, which enables SiP packaging with different structures.

Actively promote the production base construction process and provide development space for expanding the scale of the industry. The company promotes capital raising investment projects and the construction of new production bases such as Shaohua Technology in accordance with the development of the integrated circuit market and customer needs. In terms of fund-raising investment projects, various fund-raising investment projects have been successfully implemented. As of 2022, 4,328 billion yuan of capital raised has been used. In terms of the construction of a new production base, Shaohua Technology has completed the first phase of plant and supporting facilities, and put it into operation in August 2022. As of the first half of 2023, Huatian Jiangsu, Huatian Shanghai and Unisem Gopeng are undergoing plant construction. The above projects and the construction and commissioning of new production bases provide development space for the company to further expand the scale of the industry.

Investment suggestions: We forecast that the company's operating income from 2023 to 2025 will be 112.05/127.49/15.073 billion yuan, with growth rates of -5.9%/13.8%/18.2% respectively; net profit of 3.78/9.62 /1,357 billion yuan, respectively; growth rates of -49.9%/154.7%/41.0% respectively; corresponding PE 76.8/30.1/21.4, respectively. As the development of artificial intelligence increases demand for computing power chips, it is expected to drive demand for advanced packaging. Considering that based on the 3D Matrix platform, Huatian Technology can achieve high-density, high-reliability 3D heterogeneous integration of multiple chips by integrating technologies such as silicon-based fan-out packaging, bipolar, TSV, C2W, and W2W, so its market share in the advanced packaging field is expected to continue to grow, coverage for the first time, and a recommendation to increase holding-A.

Risk warning: risk of industry and market fluctuations; risk of international trade friction; risk of new technology, new processes, and products not being industrialized as scheduled; risk of major raw material supply and price changes, etc.