Through the window of ASML (ASML.US) Investor Day, we can see that despite many uncertainties faced by the chip industry, such as geopolitical issues and economic fluctuations, the overall market still shows strong resilience. Taking ASML as an example, the company confirmed its financial expectations from 2024 to 2030—annual revenue is expected to be between 44 billion to 60 billion euros, with a gross margin between 56% and 60%. This expectation is consistent with the targets announced in 2022, indicating ASML's strategic stability and continuous growth potential in the global semiconductor industry.

Looking at the entire semiconductor industry, the continuous increase in capital expenditures and the advancement of technological innovation further confirm the core position of the semiconductor industry in the global economic landscape. It is worth noting that China, as the largest semiconductor market in the world, is gradually increasing its participation and influence in the Industry Chain, becoming an undeniable force in this field.

The semiconductor industry under capital competition

Capital expenditure is an important indicator to measure whether the development status of the semiconductor industry is healthy or not. According to the information from ASML's Investor Day, as shown in the figure below, from 2015 to 2024, both the pre-tax profit (EBIT) and R&D expenditure in the semiconductor ecosystem have increased year by year, with an average annual growth rate of 10% for EBIT and slightly higher than that for R&D expenditure, reaching a growth rate of 12%. (Note: EBIT simply refers to a company's profit before deducting interest and income tax. The difference between EBIT and Net income is that EBIT more directly reflects the profitability of the core business; Net income reflects the overall profitability of the enterprise.)

Despite the sluggish market, the ecosystem still generated over 865 billion dollars in pre-tax profit (EBIT) in 2023. It is expected that the EBIT of the semiconductor industry will reach 1,046 billion dollars in 2024, while R&D expenditure will reach 541 billion dollars. The semiconductor ecosystem has allocated about half of its EBIT to drive long-term innovation and growth, and ASML expects this trend to continue. This clearly demonstrates the strong innovation-driving capability of the semiconductor ecosystem.

Trends in R&D expenditure and pre-tax profit from 2015 to 2024 (forecasted values).

(Source of the image: ASML 2024 Investor Day)

In 2024, the chip industry is launching an unprecedented "R&D competition," with global semiconductor giants investing in technological innovation at an unprecedented level:

The research and development investment of Taiwan Semiconductor (TSM.US), the wafer foundry giant, has grown from 90.5 billion NTD in 2019 to 178.7 billion NTD by 2023. When unveiling the secrets to Taiwan Semiconductor's success at the end of this year, Morris Chang stated that he determined 14 years ago, at the age of 79, that the company's annual R&D spending would reach 8% of revenues. Analysts estimate that this year's revenue for Taiwan Semiconductor could challenge 3 trillion NTD, and based on this, the R&D expenditure for this year is projected to reach 240 billion NTD.

In the third quarter of 2024, Samsung Semiconductors' R&D spending reached a historic high of approximately 8.87 trillion KRW, up 9.24% from the previous quarter. Additionally, Samsung Electronics is constructing a semiconductor R&D complex in the Giheung area of South Korea, covering about 0.109 million square meters, with plans to invest 20 trillion KRW by 2030.

ASML's R&D expenditure has surged from 1.1 billion euros in 2014 to an expected 4.3 billion euros in 2024, nearly quadrupling over the past decade. In 2024, R&D expenses will account for 15% of ASML's total revenue of 28 billion euros. It is projected that by 2030, ASML's R&D investment will reach between 6 billion and 6.6 billion euros.

Currently, NVIDIA, the semiconductor company with the highest market cap (3 trillion USD), has seen its R&D investment grow from 1.463 billion USD in 2017 to 8.675 billion USD in 2024, an increase of nearly six times during this period. Currently, NVIDIA dominates over 80% of the AI Chip market. The substantial increase in expenditure highlights NVIDIA's commitment to continuous innovation, especially in AI Hardware and Software, which is crucial for success in an increasingly competitive market.

Broadcom (AVGO.US) has increased its R&D expenditure from 3.29 billion USD in 2017 to 5.25 billion USD in 2023, with an all-time high of 9.3 billion USD in the 2024 fiscal year driven by AI. This high level of R&D has resulted in Broadcom holding over 23,000 patents, including as many as 21,000 in the IP field, establishing strong competitiveness in the semiconductor technology and infrastructure software markets.

These high R&D expenditures demonstrate companies' confidence in the long-term development of the semiconductor market. From autonomous driving, Smart Home, to Medical health and industrial automation, the rapid proliferation of AI is continually driving the demand for high-performance computing. Especially driven by AI, the semiconductor industry is experiencing enormous growth potential. ASML reiterated its optimistic forecast that global semiconductor sales will exceed 1 trillion USD by 2030, expecting that global semiconductor sales will grow at a compound annual growth rate of 9% from 2025 to 2030. However, ASML also warned that the pace of AI adoption in the Consumer sector still has a degree of uncertainty.

In the capital expenditure of the entire semiconductor industry, building foundries is undoubtedly one of the most costly areas. In recent years, countries around the globe have introduced policies aiming to enhance local wafer manufacturing capabilities. In terms of scale, Asia will continue to be the core region for global semiconductor manufacturing in the future. According to ASML's statistics, Asia is expected to build 78 new wafer fabs, accounting for the majority of new wafer fabs globally; in contrast, the Americas are expected to build 18 and Europe and the Middle East are projected to build 12. Specifically, leading global wafer foundries are accelerating capacity expansion worldwide through substantial investments: Taiwan Semiconductor is investing in the USA, Europe, and Taiwan; Samsung is establishing new factories in the USA and South Korea; SK Hynix is expanding its capacity in the USA and South Korea; Micron is also setting up factories in the USA and Japan; Intel is investing not only in its home market but also expanding in Europe; and the emerging Japanese company Rapidus is laying out plans in Japan.

Meanwhile, from the global semiconductor ecosystem chart depicted by ASML, it can be seen that Chinese companies are gradually emerging in various stages of the Industry Chain. Chinese companies represented by BYD, Alibaba, Xiaomi, and Tencent are increasing their influence in Hardware, wafer manufacturing, and service sectors, gradually becoming a key force in this ecosystem that cannot be ignored. In the field of AI, according to the "2024 Global Digital Economy White Paper" released by the China Academy of Information and Communications Technology, by the first quarter of 2024, China has already had 71 AI unicorns and 478 large models, showing a strong momentum in technological development.

Comparing the EBIT of different companies in the Industry can provide insight into a company's competitive position.

(Source of the image: ASML 2024 Investor Day)

Driven by AI, Moore's Law continues to advance.

Moore's Law has faced much skepticism in recent years, but according to ASML's research, it remains very healthy in the field of computing power. The number of transistors in each package continues to double every two years, projected to reach one trillion transistors by 2030. Furthermore, the development of generative AI will accelerate the progress of Moore's Law, with the growth rates of generative AI and high-performance computing (HPC) surpassing Moore's Law, the latter growing at a rate of 16 times every two years. By 2030, over 70% of Datacenter demand may be driven by AI, with generative AI accounting for over 90% of computing demand (FLOPs).

Therefore, for the semiconductor industry, reducing transistor size remains the simplest method to lower costs and increase efficiency. Companies in the semiconductor ecosystem will continue to promote chip miniaturization from various dimensions.

First, in advanced process technology:

1) Taiwan Semiconductor plays a crucial leading role in the advanced process sector, expecting to mass produce 2nm in the second half of 2025. According to Taiwan Semiconductor's presentation at IEDM 2024, the N2 node is 15% faster than N3, with power consumption reduced by 30%, and chip density increased by over 1.15 times.

Intel is also promoting the mass production of the 18A process. In August 2024, Intel announced that its 18A chips have been powered on and successfully started the operating system, which will be used for the new generation of client and server products to be launched in 2025.

Secondly, the continuous advancement of advanced processes and the enhancement of computing power rely on support from advanced packaging technology. For a significant period in the future, the collaborative development of advanced packaging technologies such as 3D packaging and 2D packaging will become a key driving force for improving chip density and performance. According to the latest report from Yole titled '2024 Advanced Packaging Market Status,' the global advanced packaging market's compound annual growth rate (CAGR) is expected to reach 11% from 2023 to 2029, and the market size is anticipated to expand to 69.5 billion dollars.

In the field of 3D packaging, representative technologies include Taiwan Semiconductor's 3D-Fabric, Intel's Foveros, and Samsung's X-Cube. Meanwhile, 2.5D packaging technology (such as CoWoS) has shown significant importance in AI Chip applications, and Taiwan Semiconductor is expanding its CoWoS capacity, aiming to increase from 0.33 million units in 2024 to 0.66 million units in 2025. Additionally, Taiwan Semiconductor is accelerating its layout for Fan-Out Panel Level Packaging (FOPLP) technology alongside companies like ASE.

Furthermore, the strategic value of Lithography machines in the Semiconductor Industry Chain cannot be overlooked. Whether it's High-NA EUV, EUV, or DUV technology, all play a crucial role in advanced processes. Currently, Intel has taken the lead in purchasing ASML's latest generation High-NA EUV Lithography machine, with Taiwan Semiconductor and Samsung also gradually expressing their purchasing needs. According to ASML's forecast, the Holistic Lithography equipment business is expected to continue growing at a compound annual growth rate (CAGR) of over 15% between 2025 and 2030, maintaining a high gross margin level. In specific applications, ASML predicts that the compound annual growth rate for EUV lithography equipment in the advanced logic chip field will be 10%-20%; meanwhile, this growth rate is even higher in the DRAM storage chip field, expected to reach 15%-25%. This further highlights the significant role of EUV technology in supporting advanced processes and meeting diversified market demands, as well as its core position in promoting innovations in semiconductor technology.

Finally, in computing power-intensive applications such as AI, high-performance computing (HPC), and Datacenters, the performance enhancement of storage technology is an important pillar for boosting computing power.

In recent years, HBM has become a standard configuration for AI Chips due to its high bandwidth, low latency, and high energy efficiency. As shown in the figure below, since 2020, Nvidia has gradually increased the configuration of HBM for its AI chips, expanding from 5 pieces of HBM2e (80GB) in the Ampere chip to the anticipated Rubin chip in 2027, which is expected to be equipped with 12 pieces of HBM4.

Additionally, AI is also driving the evolution of DRAM architectures. The traditional von Neumann architecture separates the processing units from the storage units, resulting in frequent data transfers that restrict system efficiency. Processing-In-Memory (PIM) is also a direction the industry is striving towards; PIM reduces data transmission power consumption through the integration of memory and logic units while minimizing the processing unit's reliance on high-frequency data exchanges.

NVIDIA AI expansion roadmap: Rapid increase in HBM memory capacity.

(Source of the image: ASML 2024 Investor Day)

Rise of Chinese Chips: Mature Process Becomes Development Focus

In the competition of Semiconductors, as mentioned earlier, in an industry landscape that was once dominated by companies from Europe, America, Japan, and South Korea, the presence of Chinese companies is gradually strengthening. Chinese companies are using mature processes as a breakthrough to gradually rise in the global semiconductor landscape.

According to ASML's analysis, the semiconductor market can be divided into 'advanced fields' and 'mainstream fields'. The advanced fields mainly involve high-end applications such as logic chips, MPU (microprocessors), and DRAM, which heavily rely on advanced processes like extreme ultraviolet Lithography (EUV), with application scenarios concentrated in cutting-edge technology areas such as the USA, South Korea, and Taiwan; while the mainstream fields cover chip products with high daily demand such as analog chips, power chips, Sensors, and NAND flash memory, mainly using Lithography technologies like ArFi, ArF, KrF, and i-Line, with widespread regional distribution covering semiconductor consumer giants like Europe, Japan, and China.

Faced with the global semiconductor industry pattern, Chinese companies have chosen a development path that better fits their own advantages—focusing on mainstream fields and mature processes. According to Statistics from TrendForce, by the end of 2024, 32 new mature wafer fabs will join the market in mainland China, coupled with the existing 44 fabs, making mainland China occupy an important position in the mature process field. These mature wafer fabs have generated a significant demand for DUV Lithography machines. Among them, in the second quarter of 2024, 49% of ASML's net system sales came from China.

During the Investor Day, ASML analyzed the value of DUV. Although EUV technology has been widely adopted in advanced processes, DUV remains a key part of many manufacturing links due to its maturity, cost-effectiveness, and widespread application scenarios. DUV technology remains a vital core tool in the semiconductor industry and will continue to play a dominant role in the future.

Since ASML's first Lithography machine entered China in 1988, it has been over 30 years in the Chinese market. Despite facing many challenges in recent years, ASML is actively seeking cooperation opportunities with the mainland China market under the premise of compliance and legality. At the 2024 China International Import Expo, ASML showcased three flagship DUV Lithography machines, including TWINSCAN NXT: 1470, NXT: 870, and the soon-to-be-released XT: 260, which attracted widespread attention. Among these, the NXT: 1470 is a powerful dual-platform ArF dry Lithography machine, becoming the industry's first system to break through a wafer production capacity of 300 pieces per hour; while the NXT: 870 is a high-performance KrF Lithography device, achieving a wafer production capacity as high as 330 pieces per hour. Both products have achieved significant breakthroughs in precision and speed, providing strong support for customers to improve production efficiency and capacity.

ASML believes that DUV technology will continue to play a dominant role in the future semiconductor industry, especially in supporting the manufacturing of analog chips, power devices, and Sensors with mature processes.

The future of Semiconductors: the game of performance and power consumption.

In the future development of the semiconductor industry, the development trends can be summarized into two core goals from a technological perspective:

The first is to continuously enhance performance and computing power to meet the demands of AI, high-performance computing, and other emerging fields.

Specifically, in the area of advanced processes, the miniaturization of chip technology nodes will continue. As shown in the figure below, it will progress from 2nm in 2025 to 1.4nm, 1nm, and down to sub-0.2.

Semiconductor manufacturers will continue to push for smaller chip sizes.

(Source of the image: ASML 2024 Investor Day)

Advanced packaging technologies (such as 3D stacking and 2D packaging) have become important means to enhance chip density and performance. Front-end 3D integration provides new development space for all semiconductor products, including NAND, DRAM, and logic chips. With the expansion of interlayer dimensions, the importance of large-field exposure systems is becoming increasingly prominent. To respond to this trend, ASML plans to launch a lithography system named XT:260 this year (2025), based on ASML's unique dual-stage technology, utilizing the widely recognized XT4 platform, which has double the exposure capability and significantly enhances performance while reducing wafer costs, suitable for a wide range of application needs from advanced packaging to mainstream markets.

Advanced packaging can benefit from the larger exposure area of the XT:260.

(Source of the image: ASML 2024 Investor Day)

Interconnection technologies such as hybrid bonding and optical interconnect are also playing a key role in increasing transistor density. For example, in the DRAM technology roadmap, future nodes such as D1c (2025) and D1d (2027) rely on innovations in wafer bonding technology. At the same time, the 6F2 architecture will continue to develop between 2025 and 2030, further enhancing chip density through multi-layer stacking and storage, and logic multi-layer bonding. By 2031, 6F2 + CBA (Cell-based Architecture) will enter a new phase, achieving another leap in density.

In terms of optical interconnect, in June 2024, Intel launched the industry's leading OCI (Optical Computing Interconnect) chip, demonstrating the potential of optical communication in high bandwidth and low power long-distance transmission. This chip integrates with the CPU, supports 64 channels of 32 Gbps, and can operate on optical fibers up to 100 meters long, meeting the stringent demands for computing power, bandwidth, and energy efficiency in AI infrastructure.

Secondly, with the rapid development of areas such as AI, Internet of Things, and 5G, controlling power consumption and optimizing costs will become increasingly important. From the perspective of the entire Industry Chain, whether in wafer manufacturing, design R&D, equipment supply, or packaging testing, various segments are driving down costs and optimizing energy consumption through innovative strategies.

From the perspective of the core process of semiconductor manufacturing—the photolithography process, ASML proposed three strategies to reduce the overall cost and carbon emissions of the wafer patterning process:

1) Increase the number of qualified transistors in each process step to improve production efficiency.

2) Simplify the overall process flow, reduce unnecessary steps, and lower complexity.

3) Minimize the cost and emissions of each processing step, optimizing the energy efficiency of each step.

In the price-sensitive DUV field, ASML addresses the core value and cost drivers in the DUV lithography process through its panoramic lithography value formula. This formula involves four key elements in lithography: Patterning Yield, Resolution, Accuracy, and Productivity, and optimizes system costs, lifespan, operational costs, and environmental costs.

ASML Panoramic Lithography Value Formula

(Source of the image: ASML 2024 Investor Day)

Only by achieving technological breakthroughs and ecological synergy in cost reduction and energy saving can the global semiconductor industry move further along the path of sustainable development.

Conclusion

Looking to the future, as summarized by ASML on the 2024 Investor Day, the long-term prospects of the semiconductor industry remain bright, with global semiconductor sales projected to grow at a compound annual growth rate of 9% (2025-2030), exceeding 1 trillion dollars by 2030.

However, the future of the semiconductor industry is not without its challenges; uncertainties remain. Geopolitical uncertainties may affect the stability of global supply chains, the speed of AI adoption will determine the pace of upgrades in advanced processes and chip architectures, a new round of capacity expansion may lead to short-term supply and demand fluctuations, and breakthroughs in new technologies also face severe challenges related to process complexity, cost pressures, and economic feasibility.

In an era of both opportunities and challenges, the semiconductor industry needs to adapt more agilely to changes, promote technological innovation more deeply, and build a tighter global collaborative ecosystem. Whether from the perspective of diversified market demands or the inevitable laws of technological evolution, the future of the semiconductor industry is not only a continuation of innovation but also a comprehensive test of flexibility, efficiency, and sustainability. In the face of a complex industrial environment and macro trends, only by maintaining an open perspective, gaining insights into cutting-edge trends, and responding to changes with strategic resolve can one take the initiative in global competition and provide solid foundational support for a digital future.

This article is reproduced from the "Semiconductors Industry Observation" WeChat official account, edited by Jiang Yuanhua from Zhitong Finance.