From the 10nm process of HBM3E chips, Samsung is trying to surpass SK Hynix and Taiwan Semiconductor in the sixth generation of high-bandwidth memory chips (HBM4) and regain its dominant position by adopting the 4nm process to produce HBM4 chip logic wafers, which is beyond the industry's expected 7~8nm process according to sources quoted in a report by the Korean Economic Daily on July 16.

Although the 4nm process is much more expensive than the 7~8nm process, it has great advantages in terms of performance and power consumption. Samsung's 4nm process yield has exceeded 70% and has been applied to the Exynos 2400 processor of the Samsung Galaxy S24 flagship phone.

With the AI boom, the demand for HBM led by GPU giants such as Nvidia continues to grow. HBM consists of multiple DRAM chips and logic wafers stacked vertically, with the logic wafer at the bottom responsible for controlling the DRAM and is the core component of HBM.

Before the fifth generation HBM3E, memory manufacturers produced logic wafers. However, starting from HBM4, it will need to go through foundry processes to meet customer customization needs. Therefore, SK Hynix has formed the 'HBM4 Alliance' with Taiwan Semiconductor.

Unlike SK Hynix, Samsung has its own wafer foundry department and has sent employees from its wafer foundry department to the HBM development team. With tight collaboration between the memory department and foundry department, Samsung seeks optimization from the design stage of logic wafers to maximize the performance and power consumption level of HBM4 chips.

However, Samsung's HBM has not yet passed Nvidia's qualification test. According to the latest report from Taiwan's Electronic Times, Samsung's HBM3E is expected to receive certification in the third quarter, and after the relevant procedures are completed, it will be mass-produced and supplied.

Of course, SK Hynix, as the main supplier of Nvidia's HBM3 and HBM3E, cannot sit still. In April of this year, it signed a memorandum of understanding with Taiwan Semiconductor to cooperate in producing HBM4, improving logic wafer performance, and integrating CoWoS technology.

At that time, industry insiders expected that SK Hynix's logic wafer would adopt the 7nm process of Taiwan Semiconductor. A recent report also stated that SK Hynix will use Taiwan Semiconductor's 5nm process to produce HBM4 logic wafers and has hired experienced logic design engineers to improve the performance of HBM4.

At the same time, in order to consolidate the HBM alliance with Nvidia, SK Hynix is trying to become a silicon intermediate layer supplier for Nvidia. According to Korean media Money Today, SK Hynix has negotiated with the world's second-largest assembly and test factory Amkor to supply silicon intermediate layer samples. SK Hynix will send its own produced HBM and silicon intermediate layer to Amkor for the assembly of GPU accelerators for customers such as Nvidia.