If the primary reason for Taiwan Semiconductor Manufacturing Co Ltd's success is to create the first contract manufacturing model in the semiconductor industry, then the continuous independent research and development in the logical process is to maintain$Taiwan Semiconductor Manufacturing Co Ltd (TSM.US) $Fuel that has been successfully moving forward. From the 3 micron process in 1987 to the 3 nm expected to be mass produced in 2022, Taiwan Semiconductor Manufacturing Co Ltd developed a new generation of new processes in an average of 2 years, which is the 35 years of Taiwan Semiconductor Manufacturing Co Ltd's logical process.

In the process of process evolution, new technologies have been developed and introduced by Taiwan Semiconductor Manufacturing Co Ltd, such as Low-K/High-K, lithography, packaging technology, EUV lithography, FinFET technology and so on. Taiwan Semiconductor Manufacturing Co Ltd is the first to achieve economies of scale in each process node. With the advantage of technological innovation in the logical process, Taiwan Semiconductor Manufacturing Co Ltd won the competitive initiative in the contract manufacturing market.

Process (also known as process node, process technology or node for short) refers to a specific semiconductor manufacturing process and its design rules. different process nodes usually mean different circuit generations and architectures. and the smaller the process node means the smaller the feature size, so that faster, more energy-saving and smaller transistors can be produced. Next, let's take a look at the process R & D trajectory of Taiwan Semiconductor Manufacturing Co Ltd, the foundry leader.

3 micron process

Taiwan Semiconductor Manufacturing Co Ltd was founded in 1987 and began to carry out the development of process technology. First of all, 3.5 micron and 2 micron process technology was transferred from Taiwan Industrial Research Institute of China, and began to customize 3 micron process technology for Philips of the Netherlands at that time.

One year after its establishment, Taiwan Semiconductor Manufacturing Co Ltd successfully developed 1.5um process technology, and then successively developed 1.2um, 1.0um, 0.8um, 0.6um, 0.5um, 0.3um and 0.25um process technology.

0.18 micron process

In 1999, Taiwan Semiconductor Manufacturing Co Ltd launched the world's first 0.18micron low power process technology. Low-voltage process is a very important process technology, which has a wide range of applications, including mobile phones, wireless communications, tablet computers, Bluetooth devices, all kinds of portable consumer electronic products, and game console products. Since then, it has been ahead of its competitors every two years to launch the next generation of low-power process technology.

TSMC has the most complete ultra-low power technology platform in the industry, covering ultra-low power processes from 0.18um to 16nm FinFET to meet the diversified needs and innovation of the Internet of things and wearable device markets. Taiwan Semiconductor Manufacturing Co Ltd's 16nm ultra-low power process can further reduce the operating voltage by 2030% compared with the previous generation, to reduce dynamic and static power consumption, and greatly extend the battery life of the Internet of things and wearable products by 2x and 10 times.

0.13 micron process

In 2001, Taiwan Semiconductor Manufacturing Co Ltd successfully developed 0.13um system monolithic (System-on-a-Chip,SoC) copper / low dielectric coefficient (Cu/Low-K) process technology. It is worth mentioning that Taiwan Semiconductor Manufacturing Co Ltd declined the cooperation of international well-known IDM semiconductor companies and insisted on setting up his own R & D team to carry out independent research and development, and finally took the lead in self-development, which also became an opportunity for its development.

TSMC's technology covers a variety of world-class SoC CMOS transistor process platforms, ultra-small SRAM memory (2.43-1.87 square microns), the world's latest 193nm lithography technology, and the world's first 8-layer low K (K).

90 nm process

At the SEMICON conference in Japan in December 2004, Taiwan Semiconductor Manufacturing Co Ltd announced that he had successfully used immersion lithography (Immersion Lithography) technology to produce a full-function 90nm chip. This is also due to the cooperation between Taiwan Semiconductor Manufacturing Co Ltd and ASML to develop the first immersion lithography machine.

Taiwan Semiconductor Manufacturing Co Ltd's innovative immersion lithography uses a 193nm lithography instead of the traditional 157nm dry lithography. Taiwan Semiconductor Manufacturing Co Ltd's innovation not only rewrites the lithography machine specifications of the global semiconductor industry, but also helps global semiconductors to break through the challenge of Moore's Law, and promotes the whole industry to move towards more advanced process technology.

65 nm process

Taiwan Semiconductor Manufacturing Co Ltd successfully trial-produced 65nm chips in 2005 and passed the product verification of 65nm process technology in 2006. Taiwan Semiconductor Manufacturing Co Ltd 65 nanotechnology is the company's third-generation semiconductor process using copper interconnection and low-k media. The standard cell gate density supported by this technology is twice that of Taiwan Semiconductor Manufacturing Co Ltd's 90 nm process. It provides better integration and improved chip performance. In 2005, Taiwan Semiconductor Manufacturing Co Ltd also launched a 65nm low power consumption (Low Power) process to meet customer needs.

Following the 65nm LP process, Taiwan Semiconductor Manufacturing Co Ltd quickly launched a wide range of process combinations, including general purpose (GP), mixed signal / radio frequency (MS/RF), embedded DRAM memory (eDRAM), multiple programmable non-volatile memory (MNVM), embedded flash memory (eFLASH), high voltage (HV), power management (BCD) and MEMS process. 65nm technology supports a wide range of applications, such as mobile devices, computers, automotive electronics, the Internet of things and smart wearable devices.

Compared with the previous generation of 90 nm process technology, the standard component density of TSMC's 65 nm process technology has doubled. This process has higher integration, better chip performance, and innovative power management technology, which can significantly reduce power consumption.

40nm process

In 2008, Taiwan Semiconductor Manufacturing Co Ltd became the first contract manufacturing enterprise that uses 40nm process technology to mass produce a variety of products for multiple customers. The 40 nm process integrates 193 nm immersion lithography and ultra-low k bonding materials to improve chip performance while reducing power consumption. The process also sets an industry record with the smallest SRAM (0.242 square microns) and the smallest macro size.

The original gate density of 40 nm general purpose (GP) and low power consumption (LP) processes is 23.5% higher than that of 65 nm processes. At the same leakage current level, the performance of 40 nm GP is 40% higher than that of 65 nm GP, and the power consumption is only half of that of 65 nm GP at the same operating speed. At the same operating speed, the 40 nm LP process can reduce the leakage current and power consumption by up to 51% compared with the 65 nm LP process.

In addition to the above processes, TSMC has launched a variety of 40nm logic process technologies to meet different product needs, including 40nm enhanced LP and 40nm ultra-low power (ULP) processes. Compared with the 40nm LP process, the performance of the 40nm enhanced LP process is improved by 30 per cent, while the leakage current of the 40nm ULP process is reduced by 70 per cent and the power consumption is reduced by 30 per cent.

40nm GP process technology is aimed at high-performance applications, including central processing unit (CPU) graphics processing units, game consoles, networks, fpga and hard drives. The 40nm LP and 40nm enhanced LP processes target smartphones, digital television (DTV), set-top boxes (set-top boxes), gaming and wireless connectivity applications. The 40nm ULP process is suitable for Internet of things and wearable applications.

28 nm process

In 2011, Taiwan Semiconductor Manufacturing Co Ltd became the first fab in the world to provide 28nm general process technology. Taiwan Semiconductor Manufacturing Co Ltd's 28nm process technology has the advantages of high performance and low power consumption, coupled with seamless integration with the 28nm design ecosystem, bringing it to market faster.

Taiwan Semiconductor Manufacturing Co Ltd's 28nm process technology is mainly based on high dielectric layer / metal gate (High-k Metal Gate,HKMG) Gate-last technology. Compared with Gate-first technology, Gate-last technology has the advantages of lower leakage current and better chip performance.

28nm process technology supports a wide range of applications, including CPU, GPU, high-speed network chips, smartphones, application processors (application processor), tablets, home entertainment, consumer electronics, automotive, Internet of things and so on.

22 nm process

The 22nm Ultra low Power (22ULP) technology is based on TSMC's industry-leading 28nm technology and completed all process certifications in the fourth quarter of 2018. Compared with 28nm high-performance compact (28HPC) technology, 22ULP can reduce the area by 10%, increase speed by more than 30%, or reduce power by more than 30% in applications such as image processing, digital TV, set-top box, smartphone and consumer products.

The development of 22nm Ultra low leakage (22ULL) technology was completed in the fourth quarter of 2018 and entered a risky production phase to support Internet of things and wearable device applications. Compared with 40ULP and 55ULP solutions, new ULL devices and static random access memory (static random access memory) can provide lower power consumption.

22nm ultra-low leakage process technology (Ultra-Low Leakage, 22ULL) has been successfully developed and started trial production as planned in the fourth quarter of 2018, which can support the application of Internet of things and wearable devices related products. Compared with 40nm ULP and 55nm ULP processes, the new ULL components and ULL static random access memory (Static Random Access Memory, SRAM) can greatly reduce power consumption.

20 nm process

In 2014, Taiwan Semiconductor Manufacturing Co Ltd used his innovative double exposure (Double Patterning) technology to become the first company in the world to start mass production of 20nm semiconductors, and set a record for Taiwan Semiconductor Manufacturing Co Ltd's fastest capacity increase in the same year. By the end of 2015, cumulative wafer shipments exceeded 1 million 12-inch wafers.

20nm technology provides better density and power values than previous technology nodes because of the use of energy-efficient transistors and interconnects, as well as the world's leading dual exposure technology. Compared with the 28nm process, the performance of the 20nm process is improved by 15%, and the total power consumption is reduced by 1/3. It is an ideal choice for performance-driven products and mobile computing application migration.

16ax 12nm process

In November 2013, Taiwan Semiconductor Manufacturing Co Ltd successfully trial-produced 16nm fin field effect transistor (FinFET) process technology, and became the first contract factory in the industry to produce 16nm FinFET full-function network processors for customers. At this time, Taiwan Semiconductor Manufacturing Co Ltd gradually caught up with and surpassed Intel Corp, who was the strongest in 14nm technology at that time.

After the success of 16nm FinFET process, Taiwan Semiconductor Manufacturing Co Ltd launched 16nm FinFET Plus (16FF+) process. Due to the rapid increase in yield and efficiency, 16FF+ quickly entered the stage of mass production in July 2015. In 2017, we began to use 16FF+ technology to produce automotive industry application products for customers.

Taiwan Semiconductor Manufacturing Co Ltd also launched the more cost-effective 16nm FinFET Compact Technology (16FFC), which was put into production in the second quarter of 2016. The process can reduce the chip linewidth and simplify the process at the same time, so it can achieve the maximum benefit in reducing the cost of the chip.

The 12-nm compact process technology (12-nm FinFET Compact Technology,12FFC) further increased the crystal density to the extreme of the 16-nm generation and entered production in the second quarter of 2017.

Compared with the 20nm SoC process, Taiwan Semiconductor Manufacturing Co Ltd's 16max 12nm 16max 12nm process is 50% faster and consumes 60% less power. It provides excellent performance and power advantages for the next generation of high-end mobile computing, network communications, consumer electronics and automotive electronics applications.

10nm process

In the first quarter of 2016, Taiwan Semiconductor Manufacturing Co Ltd began to accept customers' finalization of 10-nanometer product designs and began to ship a large number of products in early 2017. Due to the adoption of larger process miniaturization, compared with the 16nm FinFET process technology, this process increases the logic density by two times, increases the speed by 15% and reduces power consumption by 35%.

Taiwan Semiconductor Manufacturing Co Ltd's 10nm FinFET supports a variety of market segments, including application processors, cellular baseband and application-specific integrated circuit designs.

7 nm process

The 256Mb SRAM yield of Taiwan Semiconductor Manufacturing Co Ltd's 7nm FinFET process reached double digits in June 2016, began trial production in April 2017, and received more than 40 customer product submissions at the end of 2018. The second generation of 7 nm (N7 +) technology began trial production in August 2018 and entered full production in 2019. N7 + is also the first in the world to use commercial EUV manufacturing technology.

At the same time, Taiwan Semiconductor Manufacturing Co Ltd's 6nm FinFET (N6) technology successfully completed product yield verification in 2019. Due to the reduction of mask layer and process complexity through EUV lithography, N6 technology can achieve better yield and shorter production cycle than N7 technology when producing the same products. In addition, the logical density of N6 manufacturing process is 18% higher than that of N7 process. At the same time, its design rules are fully compatible with Taiwan Semiconductor Manufacturing Co Ltd's proven N7 technology, making its integrated design ecosystem reusable. Therefore, it provides a seamless migration path and provides customers with a fast design cycle under very limited engineering resources, which can not only realize the benefits provided by new technologies, but also significantly reduce customers' product design cycle and time to market.

N6 technology began trial production in the first quarter of 2020 and mass production by the end of 2020. Continuing the leadership of the 7nm family in power consumption and performance, the N6 supports a wide range of product applications, including high-to mid-level mobile products, consumer applications, artificial intelligence, Netcom, 5G infrastructure, GPU, and HPC.

Compared with the 10nm FinFET process, Taiwan Semiconductor Manufacturing Co Ltd's 7nm FinFET logic density is 1.6 times higher, the speed is 20% higher, and the power is 40% lower. Taiwan Semiconductor Manufacturing Co Ltd launched two separate 7nm FinFET products, setting another industry record: one optimized for mobile applications and the other optimized for high-performance computing applications.

5 nanometer process

In the second quarter of 2020, Taiwan Semiconductor Manufacturing Co Ltd successfully mass-produced 5 nm (N5) FinFET process technology. N5 technology is Taiwan Semiconductor Manufacturing Co Ltd's second generation of EUV process technology. N5 technology is about 20% faster than N7 technology, or about 40% less power. N5 technology mainly provides customers with innovations in smartphones and high-performance computing applications.

Wafer 18 factory P1~P4 has 4 5 nm and 4 nm process plants

In addition, Taiwan Semiconductor Manufacturing Co Ltd also launched the enhanced 4nm (N4) technology of N5 technology. N4 provides further enhancements in performance, power and density for the next wave of N5 products. The development of N4 technology is proceeding as planned and is making good progress, and mass production is expected to begin in 2022.

At NVIDIA Corp's GTC conference in March this year, NVIDIA Corp's Hopper architecture has already adopted Taiwan Semiconductor Manufacturing Co Ltd's N4 technology.

3 nanometer process

After 5 nanometers, Taiwan Semiconductor Manufacturing Co Ltd will usher in a whole-era manufacturing process. According to Taiwan Semiconductor Manufacturing Co Ltd, the N3 process will be the most advanced process technology in the industry when it is launched. compared with the N5 process technology, the logic density of the N3 process technology will increase by about 70%, and the speed will increase by 10-15% at the same power consumption. or reduce power consumption by 25-30% at the same speed. The development of N3 process technology is in line with expectations and is making good progress, and mass production is expected to begin in the second half of 2022.

In addition to 5nm, wafer 18 factory is also the main production plant of Taiwan Semiconductor Manufacturing Co Ltd 3nm, mainly P5~P8 a total of 4 3nm factories. P4~P6 's Fab 18B factory production line has been completed.

Write at the end

Technology is one of the cornerstones of Taiwan Semiconductor Manufacturing Co Ltd. Three nanometers later, Taiwan Semiconductor Manufacturing Co Ltd also stepped up exploration in the fields of super 2nm nodes, 3D transistors, new memory and low R interconnection. Taiwan Semiconductor Manufacturing Co Ltd's logic process research and development has not stopped.